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Cache memory
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#	Item
991	AMD’s Mustang versus Intel’s Willamette (A performance analysis for high tech investors) AMD’s near term future looks rosy with Spitfire and Thunderbird getting ready to take on Celeron II and Coppermine with highe Add to Reading List Source URL: www.chip-architect.com Language: English - Date: 2009-05-14 06:18:04 Instruction set architectures Central processing unit CPU cache Cache Computer memory P6 Itanium Alpha 21264 AMD 10h Computer architecture Computer hardware Computing
992	CS162, Spring 2004 UC Berkeley Discussion #10 Amir Kamil Add to Reading List Source URL: www.eecs.berkeley.edu Language: English - Date: 2004-05-15 22:56:24 Central processing unit Computer architecture Computer memory Memory management Translation lookaside buffer Search algorithms CPU cache Page table Page Virtual memory Computer hardware Computing
993	R.W. Hartenstein, A.G. Hirschbiel, M. Riedmuller, K. Schmidt, M.Weber: A High Performance Machine Paradigm Based on Auto-Sequencing Data Memory; HICSS-24, Hawaii Int. Conference on System Sciences, Koloa Hawaii, 1991 A Add to Reading List Source URL: hartenstein.de Language: English - Date: 2012-03-09 12:37:00 Computer hardware Parallel computing Cache Systolic array Instruction set Microcode Computer Computer architecture Central processing unit Computing
994	MiMagic 6+ Application Processor MM6+ High System Performance • ARM926EJ RISC processor (v5TEJ), 200MHz • 16KB I-cache, 16KB D-cache for Add to Reading List Source URL: www.neomagic.com Language: English - Date: 2014-04-28 16:07:59 Computing Memory Stick Microcontrollers Embedded Linux Linux-based devices Computer hardware Secure Digital Flash memory
995	R.W. Hartenstein, A.G. Hirschbiel, M. Riedmuller, K. Schmidt, M.Weber: A High Performance Machine Paradigm Based on Auto-Sequencing Data Memory; HICSS-24, Hawaii Int. Conference on System Sciences, Koloa Hawaii, 1991 A Add to Reading List Source URL: xputer.de Language: English - Date: 2012-03-17 07:18:56 Computer hardware Parallel computing Cache Systolic array Instruction set Microcode Computer Computer architecture Central processing unit Computing
996	OzSort: Sorting over 246GB for a Penny Nikolas Askitis Department of Computer Science and Software Engineering The University of Melbourne. [removed] Add to Reading List Source URL: sortbenchmark.org Language: English - Date: 2009-05-14 12:49:00 Computer memory Order theory External sorting Advanced Micro Devices Merge sort AMD 10h Merge algorithm Prefetch buffer CPU cache Sorting algorithms Computing Computer hardware
997	Guiding Philosophy • CPU cycles are Cheap, People cycles are not[removed]:[removed] Add to Reading List Source URL: pt.withy.org Language: English - Date: 2003-03-19 14:02:39 Lisp programming language Central processing unit Procedural programming languages Computer memory Programming language implementation Program optimization Lisp CPU cache Compiler Computing Software engineering Computer programming
998	psort, yet another fast stable external sorting software Paolo Bertasi, Marco Bressan and Enoch Peserico Dept. of Information Engineering, Univ. Padova, Italy May 25, 2008 Abstract Add to Reading List Source URL: sortbenchmark.org Language: English - Date: 2008-07-01 14:27:48 Order theory Computer hardware External sorting CPU cache Merge sort Cache Circular buffer Data buffer RAID Computer memory Sorting algorithms Computing
999	R.W. Hartenstein, A.G. Hirschbiel, M. Riedmuller, K. Schmidt, M.Weber: A High Performance Machine Paradigm Based on Auto-Sequencing Data Memory; HICSS-24, Hawaii Int. Conference on System Sciences, Koloa Hawaii, 1991 A Add to Reading List Source URL: hartenstein.de Language: English - Date: 2012-03-09 12:41:54 Computer hardware Parallel computing Cache Systolic array Instruction set Microcode Computer Computer architecture Central processing unit Computing
1000	Hints for ComputerSystem Design Butler W. Larnpson Computer Science Laboratory Xerox Palo Alto Research Center Palo Alto, CA[removed]and studied many other systems, both successful and unsuccessful. From this experience co Add to Reading List Source URL: www.stanford.edu Language: English - Date: 2004-05-19 15:35:14 Computer architecture Memory management Cache CPU cache Computer data storage Operating system File system Interface Paging Computing Computer hardware Computer memory